The present invention relates to a boot-strap type signal generating circuit composed of field effect transistors, and more particularly to a boot-strap type signal generating circuit to be used for generating a timing signal in a dynamic memory circuit.
Boot-strap type signal generating circuits are widely utilized in MOS dynamic circuits to generating timing signals. A boot-strap type signal generating circuit is typically structured as follows. A high voltage output transistor and a low voltage output transistor are connected between a power voltage terminal and a ground voltage terminal and a boot-strap capacitor is connected between a gate of the high voltage output transistor and the intermediate junction of the high and low voltage output transistors. An input signal is applied to the gate of the high voltage output transistor via a source-drain path of a transfer gate transistor while a delayed inverted signal of the input signal (delayed inverted input signal) is applied to the gate of the low voltage output transistor. The boot-strap capacitor is charged during a delay period of the delayed inverted input signal and after the delay period the gate potential of the high voltage output transistor is raised above the power voltage at the power voltage terminal. However, according to the above conventional boot-strap type signal generating circuit, the input signal itself is applied to the gate of the high voltage output transistor and the effective capacitance at the gate of the high voltage output transistor is large. Therefore, it is difficult to drive the gate potential of the high voltage output transistor at a high speed by the input signal. This means a large input capacitance and affects the behavior of the input signal itself. Furthermore, a desired timing relation between the input signal and an output signal to be generated in accordance with the boot-strapped gate potential of the high voltage output transistor is not ensured.